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? semiconductor components industries, llc, 2010 june, 2010 ? rev. 8 1 publication order number: adm1021a/d adm1021a low cost microprocessor system temperature monitor microcomputer the adm1021a is a two?channel digital thermometer and under/overtemperature alarm, intended for use in personal computers and other systems requiring thermal monitoring and management. the device can measure the temperature of a microprocessor using a diode?connected pnp transistor , which can be provided on?chip with the pentium ? iii or similar processors, or can be a low cost discrete npn/pnp device, such as the 2n3904/2n3906. a novel measurement technique cancels out the absolute value of the transistor?s base emitter voltage so that no calibration is required. the second measurement channel measures the output of an on?chip temperature sensor to monitor the temperature of the device and its environment. the adm1021a communicates over a two?wire serial interface compatible with smbus standards. under/overtemperature limits can be programmed into the device over the serial bus, and an alert output signals when the on?chip or remote temperature is out of range. this output can be used as an interrupt or as an smbus alert. features ? alternative to the adm1021 ? on?chip and remote temperature sensing ? no calibration necessary ? 1 c accuracy for on?chip sensor ? 3 c accuracy for remote sensor ? programmable over/undertemperature limits ? programmable conversion rate ? 2?wire smbus serial interface ? supports system management bus (smbus) alert ? 200 a max operating current ? 1 a standby current ? 3.0 v to 5.5 v supply ? small 16?lead qsop package applications ? desktop computers ? notebook computers ? smart batteries ? industrial controllers ? telecom equipment ? instrumentation http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 14 of this data sheet. ordering information xxx = device code # = pb?free package yyww = date code marking diagram 1 qsop?16 case 492 1021aa rqz #yyww 1 2 3 4 5 6 7 8 adm1021a top view 14 13 12 11 10 9 v dd d+ d? gnd add1 nc nc add0 gnd nc alert sdata nc 16 15 nc stby sclk pin assignment
adm1021a http://onsemi.com 2 figure 1. functional block diagram status register local temperature high limit comparator local temperature low limit register analog mux busy local temperature value register run/standby local temperature low limit comparator remote temperature low limit comparator address pointer register one-shot register conversion rate register local temperature high limit register configuration register interrupt masking external diode open?circuit smbus interface adm1021a nc v dd nc nc nc nc d+ d- alert stby sdata sclk add0 add1 gnd gnd nc = no connect a?to?d converter on?chip temperature sensor remote temperature value register remote temperature high limit comparator 3 4 1 2 5 7 8 9 13 16 12 14 10 6 15 11 remote temperature low limit register remote temperature high limit register absolute maximum ratings parameter rating unit positive supply voltage (v dd ) to gnd ?0.3 to +6.0 v d+, add0, add1 ?0.3 to v dd +0.3 v d? to gnd ?0.3 to +0.6 sclk, sdata, alert , stby ?0.3 to +6.0 v input current 50 ma input current, d? 1 ma esd rating, all pins (human body model) 2000 v continuous power dissipation up to 70 c derating above 70 c 650 6.7 mw mw/ c operating temperature range ?55 to +125 c maximum junction temperature (t j max) 150 c storage temperature range ?65 to +150 c lead temperature, soldering (10 sec) 300 c ir reflow peak temperature 220 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. note: this device is esd sensitive. use standard esd precautions when handling. thermal characteristics parameter rating 16 ? lead qsop package ja = 105 c/w
adm1021a http://onsemi.com 3 pin assignment pin no. mnemonic description 1 nc no connect. 2 v dd positive supply, 3.0 v to 5.5 v. 3 d+ positive connection to remote temperature sensor. 4 d? negative connection to remote temperature sensor. 5 nc no connect. 6 add1 three?state logic input, higher bit of device address. 7 gnd supply 0 v connection. 8 gnd supply 0 v connection. 9 nc no connect. 10 add0 three?state logic input, lower bit of device address. 11 alert open?drain logic output used as interrupt or smbus alert . 12 sdata logic input/output, smbus serial data. open?drain output. 13 nc no connect. 14 sclk logic input, smbus serial clock. 15 stby logic input selecting normal operation (high) or standby mode (low). 16 nc no connect. electrical characteristics (t a = t min to t max , v dd = 3.0 v to 3.6 v, unless otherwise noted. (note 1) parameter test conditions / comments min typ max unit power supply and adc temperature resolution guaranteed no missed codes 1.0 c temperature error, local sensor ?3.0 1.0 +3.0 c temperature error, remote sensor t a = 60 c to 100 c ?3.0 ?5.0 +3.0 +5.0 c supply voltage range (note 2) 3.0 3.6 v undervoltage lockout threshold v dd input, disables adc, rising edge 2.5 2.7 2.95 v undervoltage lockout hysteresis 25 mv power?on reset threshold v dd , falling edge (note 3) 0.9 1.7 2.2 v por threshold hysteresis 50 mv standby supply current v dd = 3.3 v, no smbus activity sclk at 10 khz 1.0 4.0 5.0 a average operating supply current 0.25 conversions/sec rate 130 200 a auto?convert mode, averaged over 4 sec 2 conversions/sec rate 225 370 a conversion time from stop bit to conversion complete (both channels) d+ forced to d? + 0.65 v 65 115 170 ms remote sensor source current high level (note 3) low level (note 3) 120 7.0 205 12 300 16 a d? source voltage 0.7 v address pin bias current (add0, add1) momentary at power?on reset 50 a
adm1021a http://onsemi.com 4 electrical characteristics (t a = t min to t max , v dd = 3.0 v to 3.6 v, unless otherwise noted. (note 1) parameter unit max typ min test conditions / comments smbus interface (see figure 2) logic input high voltage, v ih stby , sclk, sdata v dd = 3.0 v to 5.5 v 2.2 v logic input low voltage, v il stby , sclk, sdata v dd = 3.0 v to 5.5 v 0.8 v smbus output low sink current sdata forced to 0.6 v 6.0 ma alert output low sink current alert forced to 0.4 v 1.0 ma logic input current, i ih , i il ?1.0 +1.0 a smbus input capacitance, sclk, sdata 5.0 pf smbus clock frequency 100 khz smbus clock low time, t low t low between 10% points 4.7 s smbus clock high time, t high t high between 90% points 4.0 s smbus start condition setup time, t su:sta 4.7 s smbus repeat start condition 250 ns setup time, t su:sta between 90% and 90% points 250 ns smbus start condition hold time, t hd:sta time from 10% of sdata to 90% of sclk 4.0 s smbus stop condition setup time, t su:sto time from 90% of sclk to 10% of sdata 4.0 s smbus data valid to sclk time for 10% or 90% of sdata to 10% of sclk 250 ns rising edge time, t su:dat time for 10% or 90% of sdata to 10% of sclk 250 ns smbus data hold time, t buf:dat 0 s smbus bus free time, t buf between start/stop condition 4.7 s sclk falling edge to sdata 1 s valid time, t vd:dat master clocking in data 1 s 1. t max = 100 c, t min = 0 c 2. operation at v dd = 5.0 v guaranteed by design; not production tested. 3. guaranteed by design; not production tested. figure 2. diagram for serial bus timing p s p t hd;sta t su;sta t su;dat t high t f t hd;dat t r t low t hd;sta s scl sda t buf t su;sto
adm1021a http://onsemi.com 5 typical performance characteristics figure 3. temperature error vs. pc board track resistance figure 4. temperature error vs. power supply noise frequency figure 5. temperature error vs. common?mode noise frequency figure 6. temperature error vs. pentium iii temperature figure 7. temperature error vs. capacitance between d+ and d? figure 8. standby supply current vs. clock frequency leakage resistance (m ) 20 15 ?25 100 temperature error ( c) 10 1 0 ?20 10 5 ?5 ?30 d+ to gnd d+ to v dd ?15 ?10 3 1 0 2 frequency (hz) 100 temperature error ( c) 4 5 100m 1k 10k 100k 1m 10m 250mv p?p remote 100mv p?p remote 5 4 3 1 0 2 frequency (hz) 1 temperature error ( c) 10 1k 10k 10m 100m 6 7 8 9 100 100k 1m 50mv p?p 100mv p?p 25mv p?p temperature ( c) 50 temperature error ( c) 60 0 70 80 100 120 ?3 ?1 1 2 3 ?2 90 110 dev10 lower spec level upper spec level capacitance (nf) 2 ?2 4 6 8 1012141618202224 temperature error ( c) 12 14 0 2 4 6 8 10 sclk frequency (khz) 1 20 0 v dd = 3.3v 51 02 55 07 5 100 1000 250 500 750 40 60 70 50 30 10 v dd = 5v supply current ( a)
adm1021a http://onsemi.com 6 typical performance characteristics figure 9. temperature error vs. differential?mode noise frequency figure 10. operating supply current vs. conversion rate figure 11. standby supply current vs. supply voltage figure 12. response to thermal shock 4 0 2 frequency (hz) temperature error ( c) 10mv p?p 100k 1m 10m 100m 1g 1 3 conversion rate (hz) 250 0.125 supply current ( a) 0.25 0.5 8 300 350 400 550 4 0.0625 450 500 200 150 100 50 5v 2 1 3.3v 0 20 supply voltage (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 40 60 80 100 ?20 supply current ( a) time (seconds) temperature ( c) 0 25 50 75 100 125 remote temperature int temperature 12345678910 0
adm1021a http://onsemi.com 7 functional description the adm1021a contains a two?channel a?to?d converter with special input?signal conditioning to enable operation with remote and on?chip diode temperature sensors. when the adm1021a is operating normally, the a?to?d converter operates in free?running mode. the analog input multiplexer alternately selects either the on?chip temperature sensor to measure its local temperature or the remote temperature sensor. these signals are digitized by the adc and the results stored in the local and remote temperature value registers as 8?bit, twos complement words. the measurement results are compared with local and remote, high and low temperature limits, stored in four on?chip registers. out?of?limit comparisons generate flags that are stored in the status register, and one or more out?of?limit results will cause the alert output to pull low. the limit registers can be programmed and the device controlled and configured via the serial system management bus (smbus). the contents of any register can also be read back via the smbus. control and configuration functions consist of: ? switching the device between normal operation and standby mode. ? masking or enabling the alert output. ? selecting the conversion rate. on initial powerup, the remote and local temperature values default to ?128 c. since the device normally powers up converting, a measurement of local and remote temperature is made, and these values are then stored before a comparison with the stored limits is made. however, if the part is powered up in standby mode (stby pin pulled low), no new values are written to the register before a comparison is made. as a result, both rlow and llow are tripped in the status register, thus generating an alert output. this can be cleared in one of two ways. 1. change both the local and remote lower limits to ?128 c and read the status register (which in turn clears the alert output). 2. take the part out of standby and read the status register (which in turn clears the alert output). this works only if the measured values are within the limit values. measurement method a simple method of measuring temperature is to exploit the negative temperature coefficient of a diode, or the base?emitter voltage of a transistor, operated at constant current. unfortunately, this technique requires calibration to null the effect of the absolute value of v be, which varies from device to device. figure 13. input signal conditioning c1* d+ i n 1 d? remote sensing transistor i bias v dd v out+ to adc v out? bias diode low?pass filter f c = 65khz * capacitor c1 is optional. it is only necessary in noisy environments. c1 = 2.2nf typ, 3nf max. the technique used in the adm1021a is to measure the change in v be when the device is operated at two different currents. this is given by: (eq. 1) v be kt q 1n ( n ) where: k is boltzmann?s constant. q is the charge on the electron (1.6 10 ?19 coulombs). t is the absolute temperature in kelvins. n is the ratio of the two currents. figure 13 shows the input signal conditioning used to measure the output of an external temperature sensor. this figure shows the external sensor as a substrate transistor provided for temperature monitoring on some microprocessors, but it could be a discrete transistor. if a discrete transistor is used, the collector will not be grounded and should be linked to the base. to prevent ground noise interfering with the measurement, the more negative terminal of the sensor is not referenced to ground, but is biased above ground by an internal diode at the d? input. if the sensor is operating in a noisy environment, one can optionally be added as a noise filter. its value is typically 2200 pf, but it should be no more than 3000 pf. see the layout considerations section for more information.
adm1021a http://onsemi.com 8 to measure v be , the sensor is switched between operating currents of i and n i. the resulting waveform is passed through a 65 khz low?pass filter to remove noise, and then to a chopper?stabilized amplifier that performs the functions of amplification and rectification of the waveform to produce a dc voltage proportional to v be . this voltage is measured by the adc to give a temperature output in 8?bit, twos complement format. to reduce the effects of noise further, digital filtering is performed by averaging the results of 16 measurement cycles. signal conditioning and measurement of the internal temperature sensor is performed in a similar manner. differences between the adm1021 and the adm1021a although the adm1021a is pin?for?pin compatible with the adm1021, there are some differences between the two devices. below is a summary of these differences and reasons for the changes. 1. the adm1021a forces a larger current through the remote temperature sensing diode, typically 205 a vs. 90 a for the adm1021. the primary reason for this is to improve the noise immunity of the part. 2. as a result of the greater remote sensor source current, the operating current of the adm1021a is higher than that of the adm1021, typically 205 a vs. 160 a. 3. the temperature measurement range of the adm1021a is 0 c to 127 c, compared with ?128 c to +127 c for the adm1021. as a result, the adm1021 should be used if negative temperature measurement is required. 4. the power?on reset values of the remote and local temperature values are ?128 c in the adm1021a as compared to 0 c in the adm1021. as the part is powered up converting (except when the part is in standby mode, that is, pin 15 is pulled low), the part measures the actual values of remote and local temperature and writes these to the registers. 5. the four msbs of the revision register can be used to identify the part. the adm1021 revision register reads 0x0x, and the adm1021a reads 0x3x. 6. the power?on default value of the address pointer register is undefined in the adm1021a and is equal to 0x00 in the adm1021. as a result, a value must be written to the address pointer register before a read is performed in the adm1021a. the adm1021 is capable of reading back local temperature without writing to the address pointer register, as it defaulted to the local temperature measurement register at powerup. 7. setting the mask bit (bit 7 config reg) on the adm1021a masks current and future alerts. on the adm1021, the mask bit, masks only alerts. any current alert has to be cleared using an ara. temperature data format one lsb of the adc corresponds to 1 c so the adc can theoretically measure from ?128 c to +127 c, although the device does not measure temperatures below 0 c; therefore, the actual range is 0 c to 127 c. the temperature data format is shown in table 1. the results of the local and remote temperature measurements are stored in the local and remote temperature value registers and are compared with limits programmed into the local and remote high and low limit registers. table 1. temperature data format temperature ( c) digital output 0 0 000 0000 1 0 000 0001 10 0 000 1010 25 0 001 1001 50 0 011 0010 75 0 100 1011 100 0 110 0100 125 0 111 1101 127 0 111 1111 registers the adm1021a contains nine registers that are used to store the results of remote and local temperature measurements, and high and low temperature limits, and to configure and control the device. a description of these registers follows, and further details are given in table 2 to table 4. it should be noted that the adm1021a?s registers are dual port and have different addresses for read and write operations. attempting to write to a read address, or to read from a write address, produces an invalid result. register addresses above 0x0f are reserved for future use or used for factory test purposes and should not be written to. address pointer register the address pointer register does not have and does not require an address, because it is the register to which the first data byte of every write operation is written automatically. this data byte is an address pointer that sets up one of the other registers for the second byte of the write operation or for a subsequent read operation. value registers the adm1021a has two registers to store the results of local and remote temperature measurements. these registers are written to by the adc and can only be read over the smbus. status register bit 7 of the status register indicates when it is high that the adc is busy converting. bit 5 to bit 3 are flags that indicate the results of the limit comparisons. if the local and/or remote temperature measurement is above the corresponding high temperature limit or below the
adm1021a http://onsemi.com 9 corresponding low temperature limit, then one or more of these flags are set. bit 2 is a flag that is set if the remote temperature sensor is open?circuit. these five flags are nor?d together so that if any of them are high, the alert interrupt latch is set and the alert output goes low. reading the status register clears the fi ve flag bits, provided the error conditions that caused the flags to be set have gone away. while a limit comparator is tripped due to a value register containing an out?of?limit measurement, or the sensor is open?circuit, the corresponding flag bit cannot be reset. a flag bit can only be reset if the corresponding value register contains an in?limit measurement, or the sensor is good. table 2. status register bit assignments bit name function 7 busy 1 when adc converting 6 lhigh* 1 when local high temp limit tripped 5 llow* 1 when local low temp limit tripped 4 rhigh* 1 when remote high temp limit tripped 3 rlow* 1 when remote low temp limit tripped 2 open* 1 when remote sensor open?circuit 1 to 0 reserved *these flags stay high until the status register is read or they are reset by por. table 3. list of adm1021a registers read address (hex) write address (hex) name power?on default not applicable not applicable address pointer undefined 00 not applicable local temperature value 1000 0000 (0x80) (?128 c) 01 not applicable remote temperature value 1000 0000 (0x80) (?128 c) 02 not applicable status undefined 03 09 configuration 0000 0000 (0x00) 04 0a conversion rate 0000 0010 (0x02) 05 0b local temperature high limit 0111 1111 (0x7f) (+127 c) 06 0c local temperature low limit 1100 1001 (0xc9) (?55 c) 07 0d remote temperature high limit 0111 1111 (0x7f) (+127 c) 08 0e remote temperature low limit 1100 1001 (0xc9) (?55 c) not applicable 0f (note 1) one?shot 10 not applicable reserved reserved for future versions 11 11 remote temperature offset 0000 0000 (0 c) 12 12 reserved reserved for future versions 13 13 reserved reserved for future versions 14 14 reserved reserved for future versions 15 16 reserved reserved for future versions 17 18 reserved reserved for future versions 19 not applicable reserved reserved for future versions 20 21 reserved reserved for future versions fe not applicable manufacturer device id 0100 0001 (0x41) ff not applicable die revision code 0011 xxxx (0x3x) 1. writing to address 0f causes the adm1021a to perform a single measurement. it is not a data register and data written to it i s irrelevant. the alert interrupt latch is not reset by reading the status register, but is reset when the alert output is serviced by the master reading the device address, provided the error condition has gone away and the status register flag bits have been reset. configuration register two bits of the configuration register are used. if bit 6 is 0, which is the power?on default, the device is in operating mode with the adc converting. if bit 6 is set to 1, the device is in standby mode and the adc does not convert. standby mode can also be selected by taking the stby pin low. in standby mode, the values stored in the remote and local temperature registers remain at the values they were when the part was placed in standby. bit 7 of the configuration register is used to mask the alert output. if bit 7 is 0, which is the power?on default, the alert output is enabled. if bit 7 is set to 1, the alert output is disabled.
adm1021a http://onsemi.com 10 table 4. configuration register bit assignments bit name function power?on default 7 mask1 0 = alert enabled 1 = alert masked 0 6 run /stop 0 = run 1 = standby 0 5 to 0 reserved 0 conversion rate register the lowest three bits of this register are used to program the conversion rate by dividing the adc clock by 1, 2, 4, 8, 16, 32, 64, or 128 to give conversion times from 125 ms (code 0x07) to 16 seconds (code 0x00). this register can be written to and read back over the smbus. the higher five bits of this register are unused and must be set to 0. use of slower conversion times greatly reduces the device power consumption, as shown in table 5. table 5. conversion rate register code data conversion/ sec average supply current a typ at v cc = 3.3 v 0x00 0.0625 150 0x01 0.125 150 0x02 0.25 150 0x03 0.5 150 0x04 1 150 0x05 2 150 0x06 4 160 0x07 8 180 0x08 to 0xff reserved limit registers the adm1021a has four limit registers to store local and remote and high and low temperature limits. these registers can be written to and read back over the smbus. the high limit registers perform a > comparison, while the low limit registers perform a < comparison. for example, if the high limit register is programmed as a limit of 80 c, measuring 81 c results in an alarm condition. even though the temperature measurement range is from 0 to 127 c, it is possible to program the limit register with negative values. this is for backwards compatibility with the adm1021. offset register an offset register is provided at address 0x11. this allows the user to remove errors from the measured remote temperature. these errors can be introduced by clock noise and pcb track resistance. see table 6 for an example of offset values. the offset value is stored as an 8?bit, twos complement value. the value of the offset is negative if the msb of register 0x11 is 1, and is positive if the msb of register 0x11 is 0. this value is added to the remote temperature. the offset register defaults to 0 at powerup. the offset register range is ?128 c to +127 c. table 6. offset values offset register remote temperature (0x11) offset value (with offset) (without offset) 1111 1100 ?4 c 14 c 18 c 1111 1111 ?1 c 17 c 18 c 0000 0000 0 c 18 c 18 c 0000 0001 +1 c 19 c 18 c 0000 0100 +4 c 22 c 18 c one?shot register the one?shot register is used to initiate a single conversion and comparison cycle when the adm1021a is in standby mode, after which the device returns to standby. this is not a data register as such, and it is the write operation that causes the one?shot conversion. the data written to this address is irrelevant and is not stored. serial bus interface control of the adm1021a is carried out via the serial bus. the adm1021a is connected to this bus as a slave device, under the control of a master device. note that the smbus and scl pins are three?stated when the adm1021a is powered down and will not pull down the smbus. address pins in general, every smbus device has a 7?bit device address (except for some devices that have extended 10?bit addresses). when the master device sends a device address over the bus, the slave device with that address responds. the adm1021a has two address pins, add0 and add1, to allow selection of the device address so that several adm1021a?s can be used on the same bus, and/or to avoid conflict with other devices. although only two address pins are provided, these are three?state and can be grounded, left unconnected, or tied to v dd so that a total of nine different addresses are possible, as shown in table 7. it should be noted that the state of the address pins is only sampled at powerup, so changing t hem after powerup has no effect. table 7. device addresses (note 1) add0 add1 device address 0 0 0011 000 0 nc 0011 001 0 1 0011 010 nc 0 0101 001 nc nc 0101 010 nc 1 0101 011 1 0 1001 100 1 nc 1001 101 1 1 1001 110 1. add0 and add1 are sampled at powerup only.
adm1021a http://onsemi.com 11 the serial bus protocol operates as follows: 1. the master initiates data transfer by establishing a start condition, defined as a high?to?low transition on the serial data line sdata, while the serial clock line sclk remains high. this indicates that an address/data stream will follow. all slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7?bit address (msb first) plus an r/w bit, which determines the direction of the data transfer, that is, whether data will be written to or read from the slave device. the peripheral whose address corresponds to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. all other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. if the r/w bit is a 0, the master writes to the slave device. if the r/w bit is a 1, the master reads from the slave device. 2. data is sent over the serial bus in sequences of nine clock pulses, eight bits of data followed by an acknowledge bit from the slave device. transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, because a low?to?high transition when the clock is high can be interpreted as a stop signal. the number of data bytes that can be transmitted over the serial bus in a single read or write operation is limited only by what the master and slave devices can handle. 3. when all data bytes have been read or written, stop conditions are established. in write mode, the master pulls the data line high during the 10th clock pulse to assert a stop condition. in read mode, the master device overrides the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. this is known as no acknowledge. the master then takes the data line low during the low period before the 10th clock pulse, then high during the 10th clock pulse to assert a stop condition. any number of bytes of data can be transferred over the serial bus in one operation, but it is not possible to mix read and write in one operation, because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. for the adm1021a, write operations contain either one or two bytes, while read operations contain one byte. to write data to one of the device data registers or read data from it, the address pointer register must be set so that the correct data register is addressed, data can then be written into that register or read from it. the first byte of a write operation always contains a valid address that is stored in the address pointer register. if data is to be written to the device, the write operation contains a second data byte that is written to the register selected by the address pointer register. this is illustrated in figure 14. the device address is sent over the bus followed by r/w set to 0. this is followed by two data bytes. the first data byte is the address of the internal data register to be written to, which is stored in the address pointer register. the second data byte is the data to be written to the internal data register. figure 14. writing a register address to the address pointer register, then writing data to the selected register r/w a6 sclk sdata a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 ack. by adm1021a start by master 1 9 19 d7 d 6 d5 d4 d3 d2 d1 d0 ack. by adm1021a stop by master 1 9 scl (continued) sda (continued) frame 1 serial bus address byte frame 3 data byte frame 2 address pointer register byte ack. by adm1021a
adm1021a http://onsemi.com 12 figure 15. writing to the address pointer register only r/w a6 11 9 sclk sdata a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 ack. by adm1021a stop b y maste r start by master ack. by adm1021a 9 frame 1 serial bus address byte frame 2 address pointer register byte figure 16. reading data from a previously selected register a6 11 9 sclk sdata a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 no ack. by master stop b y maste r start by master ack. by adm1021a 9 frame 1 serial bus address byte frame 2 data byte from adm1021a r/w when reading data from a register there are two possibilities: 1. if the adm1021a?s address pointer register value is unknown or not the desired value, it is first necessary to set it to the correct value before data can be read from the desired data register. this is done by performing a write to the adm1021a as before, but only the data byte containing the register read address is sent, because data is not to be written to the register. this is shown in figure 15. a read operation is then performed consisting of the serial bus address, r/w bit set to 1, followed by the data byte read from the data register. this is shown in figure 16. 2. if the address pointer register is known to be already at the desired address, data can be read from the corresponding data register without first writing to the address pointer register, so figure 15 can be omitted. notes: 1. although it is possible to read a data byte from a data register without first writing to the address pointer register, if the address pointer register is already at the correct value, it is not possible to write data to a register without writing to the address pointer register; this is because the first data byte of a write is always written to the address pointer register. 2. remember that the adm1021a registers have different addresses for read and write operations. the write address of a register must be written to the address pointer if data is to be written to that register, but it is not possible to read data from that address. the read address of a register must be written to the address pointer before data can be read from that register. alert output the alert output goes low whenever an out?of?limit measurement is detected, or if the remote temperature sensor is open?circuit. it is an open drain and requires a 10 k pullup to v dd . several alert outputs can be wire?anded together so th e common line goes low if one or more of the alert outputs goes low. the alert output can be used as an interrupt signal to a processor, or it can be used as an smbalert . slave devices on the smbus cannot normally signal to the master that they want to talk, but the smbalert function allows them to do so. one or more alert outputs are connected to a common smbalert line connected to the master. when the smbalert line is pulled low by one of the devices, the following procedure occurs, as shown in figure 17. figure 17. use of smbalert master receives smbalert master sends ara and read command no ack start alert response address rd ack device address stop device sends its address 1. smbalert is pulled low. 2. master initiates a read operation and sends the alert response address (ara = 0001 100). this is a general call address that must not be used as a specific device address. 3. the device whose alert output is low responds to the alert response address and the master reads its device address. the address of the device is now known and it can be interrogated in the usual way. 4. if more than one device?s alert output is low, the one with the lowest device address has priority, in accordance with normal smbus arbitration.
adm1021a http://onsemi.com 13 5. once the adm1021a has responded to the alert response address, it resets its alert output, provided that the error condition that caused the alert no longer exists. if the smbalert line remains low, the master sends the ara again, and so on until all devices whose alert outputs were low have responded. low power standby modes the adm1021a can be put into a low power standby mode using hardware or software, that is, by taking the stby input low, or by setting bit 6 of the configuration register. when stby is high or bit 6 is low, the adm1021a operates normally. when stby is pulled low or bit 6 is high, the adc is inhibited, so any conversion in progress is terminated without writing the result to the corresponding value register. the smbus is still enabled. power consumption in the standby mode is reduced to less than 10 a if there is no smbus activity or 100 a if there are clock and data signals on the bus. these two modes are similar but not identical. when stby is low, conversions are completely inhibited. when bit 6 is set but stby is high, a one?shot conversion of both channels can be initiated by writing 0xxx to the one?shot register (address 0x0f). sensor fault detection the adm1021a has a fault detector at the d+ input that detects if the external sensor diode is open?circuit. this is a simple voltage comparator that trips if the voltage at d+ exceeds v cc ? 1.0 v (typical). the output of this comparator is checked when a conversion is initiated and sets bit 2 of the status register if a fault is detected. if the remote sensor voltage falls below the normal measuring range, for example due to the diode being short?circuited, the adc outputs ?128 c (1000 0000). since the normal operating temperature range of the device only extends down to 0 c, this output code is never seen in normal operation; therefore, it can be interpreted as a fault condition. in this respect, the adm1021a differs from and improves upon competitive devices that output 0 if the external sensor goes short?circuit. these devices can misinterpret a genuine 0 c measurement as a fault condition. if the external diode channel is not being used and is shorted out, the resulting alert can be cleared by writing 0x80 (?128 c) to the low limit register. factors affecting accuracy remote sensing diode the adm1021a is designed to work with substrate transistors built into processors, or with discrete transistors. substrate transistors are generally pnp types with the collector connected to the substrate. discrete types can be either pnp or npn, connected as a diode (base shorted to collector). if an npn transistor is used, the collector and base are connected to d+ and the emitter to d?. if a pnp transistor is used, the collector and base are connected to d? and the emitter to d+. the user has no choice in the case of substrate transistors, but if a discrete transistor is used, the best accuracy is obtained by choosing devices according to the following criteria: 1. base?emitter voltage greater than 0.25 v at 6 a, at the highest operating temperature. 2. base?emitter voltage less than 0.95 v at 100 a, at the lowest operating temperature. 3. base resistance less than 100 . 4. small variation in h fe (such as 50 to 150), which indicates tight control of v be characteristics. transistors, such as 2n3904, 2n3906, or equivalents, in sot?23 package are suitable devices to use. thermal inertia and self?heating accuracy depends on the temperature of the remote?sensing diode and/or the internal temperature sensor being at the same temperature as that being measured, and a number of factors can affect this. ideally, the sensor should be in good thermal contact with the part of the system being measured, for example the processo r. if it is not, the thermal inertia caused by the mass of the sensor causes a lag in the response of the sensor to a temperature change. for the remote sensor, this should not be a problem, because it is either a substrate transistor in the processor or a small package device, such as sot?23, placed in close proximity to it. the on?chip sensor is, however, often remote from the processor and only monitors the general ambient temperature around the package. the thermal time constant of the qsop?16 package is approximately 10 seconds. in practice, the package will have an electrical, and hence a thermal, connection to the printed circuit board, so the temperature rise due to self?heating is negligible. layout considerations digital boards can be electrically noisy environments, and because the adm1021a is measuring very small voltages from the remote sensor, care must be taken to minimize noise induced at the sensor inputs. the following precautions should be taken: 1. place the adm1021a as close as possible to the remote sensing diode. provided that the worst noise sources, such as clock generators, data/address buses, and crts, are avoided, this distance can be four to eight inches. 2. route the d+ and d? tracks close together, in parallel, with grounded guard tracks on each side. provide a ground plane under the tracks, if possible. 3. use wide tracks to minimize inductance and reduce noise pickup. 10 mil track minimum width and spacing is recommended. 4. try to minimize the number of copper/solder joints, which can cause thermocouple effects.
adm1021a http://onsemi.com 14 where copper/solder joints are used, ensure they are in both the d+ and d? paths and at the same temperature. thermocouple effects should not be a major problem as 1 c corresponds to about 240 v, and thermocouple voltages are about 3 v/ c of temperature difference. unless there are two thermocouples with a big temperature differential between them, thermocouple voltages should be much less than 240 v. 5. place a 0.1 f bypass capacitor close to the v dd pin, and 2200 pf input filter capacitors across d+, d? close to the adm1021a. 6. if the distance to the remote sensor is more than eight inches, the use of twisted pair cable is recommended. this works up to about 6 to 12 feet. 7. for very long distances (up to 100 feet), use shielded twisted pair, such as belden #8451 microphone cable. connect the twisted pair to d+ and d? and the shield to gnd close to the adm1021a. leave the remote end of the shield unconnected to avoid ground loops. figure 18. arrangement of signal tracks 10mil gnd d+ gnd d? 10mil 10mil 10mil 10mil 10mil 10mil 10mil 10mil 10mil 10mil because the measurement technique uses switched current sources, excessive cable and/or filter capacitance can affect the measurement. when using long cables, the filter capacitor can be reduced or removed. cable resistance can also introduce errors. a series resistance of 1 introduces about 1 c error. application circuits figure 19 shows a typical application circuit for the adm1021a, using a discrete sensor transistor connected via a shielded, twisted pair cable. the pullups on sclk, sdata, and alert are required only if they are not already provided elsewhere in the system. the sclk and sdata pins of the adm1021a can be interfaced directly to the smbus of an i/o chip. figure 20 shows how the adm1021a might be integrated into a system using this type of i/o controller. figure 19. typical application circuit v dd stby sclk sdata alert add0 add1 gnd d+ d? 0.1 f all 3.3 v to control chip set to required address in out i/o c1* shield 2n3904 * c1 is optional adm1021a 10k figure 20. typical system using adm1021a usb processor display system bus display cache system memory gmch fwh (firmware hub) adm1021a d? d+ alert sclk sdata super i/o smbus pci bus pci slots 2 usb ports c d?rom hard disk 2 ide ports ich i/o controller hub usb ordering information device number temperature range package type package option shipping ? adm1021aarqz 0 c to +100 c 16 ? lead qsop rq?16 98 tube adm1021aarqz ? r 0 c to +100 c 16 ? lead qsop rq?16 2500 tape & reel adm1021aarqz ? r7 0 c to +100 c 16 ? lead qsop rq?16 1000 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *the ?z?? suffix indicates pb?free part.
adm1021a http://onsemi.com 15 package dimensions qsop16 case 492?01 issue o max millimeters g r ?b? ?a? l m 0.25 (0.010) t u ?t? seating plane k d 16 pl c m 0.25 (0.010) t ba s s v n j m f 8 pl detail e detail e h x 45 rad. mold pin dim min max min inches a 4.80 4.98 0.189 0.196 b 3.81 3.99 0.150 0.157 c 1.55 1.73 0.061 0.068 d 0.20 0.31 0.008 0.012 f 0.41 0.89 0.016 0.035 g 0.64 bsc 0.025 bsc h 0.20 0.46 0.008 0.018 j 0.249 0.191 0.0098 0.0075 k 0.10 0.25 0.004 0.010 l 5.84 6.20 0.230 0.244 m 0 8 0 8 n 0 7 0 7 p 0.18 0.28 0.007 0.011 q 0.51 dia 0.020 dia r 0.64 0.89 0.025 0.035 u 0.64 0.89 0.025 0.035 v notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. the bottom package shall be bigger than the top package by 4 mils (note: lead side only). bottom package dimension shall follow the dimension stated in this drawing. 4. plastic dimensions does not include mold flash or protrusions. mold flash or protrusions shall not exceed 6 mils per side. 5. bottom ejector pin will include the country of origin (coo) and mold cavity i.d. 0 8 0 8 mark q p 0.013 x 0.005 dp. max rad. 0.005?0.010 typ on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 adm1021a/d protected by u.s. patents 5,195,827; 5,867,012; 5,982,221; 6,097,239; 6,133,753; 6,169,442; other patents pending. pentium is a registered trademark of intel corporation. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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